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Post Silicon Debug Development Engineer | Development Engineer in Engineering Job at Intel in Sant1

This listing was posted on ITJobsWeb.

Post Silicon Debug Development Engineer

Location:
Santa Clara, CA
Description:

Job Description Intel's Post Silicon Debug technology pathfinding team is responsible for next generation ion beam technology, circuit edit, and transistor probe technology developments. The Circuit Edit Research and Development Engineer's responsibilities include:Execution of experiments for new generations of focused ion beam (FIB) platforms and ion beam technologies (e.g., Xenon Plasma FIB; Gallium FIB; Neon/Helium FIB; Cold Beam)Provide analytical support on ion beam machined samples, including SEM, cross-section analysis, TEM / EDS analysis, mechanical probing, device testing, and electrical characterization.Providing silicon debug support on Intel's leading-edge server and client products.Additional responsibilities include:Collaborating with the operation support team to develop and improve new circuit editing processes for the current and next-generation node.Working with circuit designers, component debug, platform validation engineering on direct write device modification and node access strategies.Working with process development engineers on developing best practices for ion beam machining for defect analysis.Good written and verbal skills, ability to create training and documentation,Ability to work both independently and collaboratively with teams across multiple organization and geographies. Qualifications This is an entry level position and will be compensated accordingly . You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience would be obtained through a combination of prior education level classes, and current level school classes, projects, research and relevant previous job and/or internship experience. Minimum Qualifications: Bachelor's degree in electrical/computer engineering, Computer Science, Chemical Engineering, Material Sciences, Physics, or a related STEM field with 1+ years of experience or a master's degree in electrical/computer engineering, Computer Science, Chemical Engineering, Material Sciences, Physics, or a related STEM field. 3+ months of experience or knowledge in any 3 or more of the following: Device physics and integrated circuit knowledge Familiarity with semiconductor fabrication process Silicon or package physical failure analysis Circuit Edit applications development or related fields. Scanning Electron Microscopy, Transmission Electron Microscopy, Focused Ion Beam system operations Device performance characterization, such as using parametric analyzer. General knowledge of electronics, Unix, PC Skills and Microsoft Office. Preferred Qualifications: Background in device physics, circuit layout, and process technology also desired.Hands on experience in vacuum technology and electron / ion microscopy highly desired. Inside this Business Group Manufacturing and Product Engineering (MPE) is responsible for test development across product segments, supporting 95% of Intel's revenue. We deliver comprehensive pre-production test suites and component/physical debug capabilities to enable high quality, high volume manufacturing. Other Locations US, OR, Hillsboro; US, CA, Folsom Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here. Annual Salary Range for jobs which could be performed in US, California: $83,077.00-$124,371.00*Salary range dependent on a number of factors including location and experience Working Model This role will require an on-site presence.Requisition #: JR0262377pca3lyuhf
Company:
Intel
Posted:
May 2 on ITJobsWeb
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Post Silicon Debug Development Engineer is a Engineering Development Engineer Job at Intel located in Santa Clara CA. Find other listings like Post Silicon Debug Development Engineer by searching Oodle for Engineering Development Engineer Jobs.